Evaluating noise resistance and speed for the new generation of symmetric-key encryption algorithms [articol]

Abstract

In some appliances speed and noise resistance of the cryptographic algorithms are critical. This is the reason we analyzed these properties of some modern block ciphers, for the declared purpose of implementing the best algorithm in hardware modules (FPGA) in order to use it as high-speed encryption device. For in depth analysis only AES, Shacal and Trivium were processed. This article presents testing, evaluation procedures and results for the above analyzed block ciphers.