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DC Field | Value | Language |
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dc.contributor.author | Feştilă, Lelia | - |
dc.contributor.author | Szolga, Lorant Andras | - |
dc.contributor.author | Cîrlugea, Mihaela | - |
dc.contributor.author | Gordan, Mihaela | - |
dc.date.accessioned | 2020-04-10T10:39:32Z | - |
dc.date.accessioned | 2021-03-01T08:39:02Z | - |
dc.date.available | 2020-04-10T10:39:32Z | - |
dc.date.available | 2021-03-01T08:39:02Z | - |
dc.date.issued | 2006 | - |
dc.identifier.citation | Feştilă, Lelia. An analog computing circuit for SVM classifiers. Timişoara: Editura Politehnica, 2006 | en_US |
dc.identifier.uri | http://primo.upt.ro:1701/primo-explore/search?query=any,contains,An%20analog%20computing%20circuit%20for%20SVM%20classifiers&tab=default_tab&search_scope=40TUT&vid=40TUT_V1&lang=ro_RO&offset=0 Link Primo | - |
dc.description.abstract | We propose an analog nonlinear current-mode circuit for computing the decision function in a SVM classifier based on radial basis kernels. The validity of design and operation was proved by simulations. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Timişoara: Editura Politehnica | en_US |
dc.relation.ispartofseries | Seria electronică şi telecomunicaţii, Tom 51(65), fasc. 1 (2006) | - |
dc.subject | SVM | en_US |
dc.subject | Euclidian distance | en_US |
dc.subject | Analog computing | en_US |
dc.subject | Classifier | en_US |
dc.title | An analog computing circuit for SVM classifiers [articol] | en_US |
dc.type | Article | en_US |
Appears in Collections: | Articole științifice/Scientific articles |
Files in This Item:
File | Description | Size | Format | |
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BUPT_ART_Feștilă_f.pdf | 3.13 MB | Adobe PDF | View/Open |
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