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https://dspace.upt.ro/xmlui/handle/123456789/6300
Title: | Low Complexity VLSI Design Using Stepwise Exponential Companding QPSK Detection In MIMO System [articol] |
Authors: | Vasanth, L. Muniraj, N.J.R. |
Subjects: | MIMO Stepwise Exponential Companding FPGA QPSK |
Issue Date: | 2021 |
Publisher: | Timișoara : Editura Politehnica |
Citation: | Vasanth, L.; Muniraj, N.J.R.: Low Complexity VLSI Design Using Stepwise Exponential Companding QPSK Detection In MIMO System. Timişoara: Editura Politehnica, 2021. |
Series/Report no.: | Journal of Electrical Engineering;Vol 21 No 2 |
Abstract: | MIMO is a modern mobile scheme used for the transmission of digitized data at high speed, which has a large number of narrow band subcarriers. It needs multiple antennas at both the transmitter and receiver side. In real time, the implementation of Multiple-Input Multiple-Output (MIMO) is more complicated. To overcome this problem, one new method was implemented, that is SEC(Stepwise Exponential Companding) based Quadrature Phase Shift Key (QPSK) detection which is implemented in Field Programmable Gate Array (FPGA) device. This method has a better feature for both Communications as well as the VLSI domain. This method has a great future for the wireless 5G system because of its spectral competence and robustness of the channel. Our investigation observed results are promising one to minimize MIMO detection complexity which can enhance the MIMO scheme operation. |
URI: | https://dspace.upt.ro/xmlui/handle/123456789/6300 |
ISSN: | 1582-4594 |
Appears in Collections: | Articole științifice/Scientific articles |
Files in This Item:
File | Description | Size | Format | |
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BUPT_ART_Vasanth,_f.pdf | 1.12 MB | Adobe PDF | View/Open |
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