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DC Field | Value | Language |
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dc.contributor.author | Naresh, C. | - |
dc.contributor.author | Karthikeyan, R. | - |
dc.date.accessioned | 2024-10-08T10:53:39Z | - |
dc.date.available | 2024-10-08T10:53:39Z | - |
dc.date.issued | 2019 | - |
dc.identifier.citation | Naresh, C.; Karthikeyani, R.: Investigation of bridgeless power factor correction in sepic based zero voltage transition in reduced ripple factor. Timişoara: Editura Politehnica, 2019. | en_US |
dc.identifier.issn | 1582-4594 | - |
dc.identifier.uri | https://dspace.upt.ro/xmlui/handle/123456789/6725 | - |
dc.description.abstract | In this paper, proffered an ultramodern bridgeless singlephase AC–DC PFC rectifier depends on SEPIC topology and it resort to a bidirectional switch and fast diodes. In the primary stage, AC voltage is indoctrinated into an uncontrolled DC voltage by means of diode rectifiers which is plunged with the second stage of isolated DC-DC converters adopting HF transformer for isolation. These two-stage ACDC converters have the obstacles of power quality in provisions of injected harmonic currents at AC mains evoked voltage distortion, degraded power factor and large size of DC capacitor filter at first stage. Subsequently the solid-state switch mode AC-DC converters having high-frequency transformer isolation are mellowed in buck, boost and buckboost configurations by improved power quality in conditions of reduced THD of input current, PFC at AC mains and correctly regulated and isolated DC output voltage feeding to loads starting few Watts to more than a few kW. Their realization of the proposed model is taking measured with the voltage and current stresses on the active switch and diodes, currents uninterrupted inductors and efficiency are juxtaposed to the available quadratic converters. The authority of the new hybrid converters is predominantly on notorious to saving in the range and rate of the inductors and less current stresses in the switching elements premier to smaller conduction losses. Enduringly the simulation results in like manner comparative performance are manifested and conversed for the majority of the proposed topologies. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Timișoara : Editura Politehnica | en_US |
dc.relation.ispartofseries | Journal of Electrical Engineering;Vol 19 No 5 | - |
dc.subject | Power Factor Correction (PFC) | en_US |
dc.subject | Total Harmonic Distortion (THD) | en_US |
dc.subject | Single-Ended Primary Inductance Converter (SEPIC) | en_US |
dc.title | Investigation of bridgeless power factor correction in sepic based zero voltage transition in reduced ripple factor [articol] | en_US |
dc.type | Article | en_US |
Appears in Collections: | Articole științifice/Scientific articles |
Files in This Item:
File | Description | Size | Format | |
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BUPT_ART_Naresh_f.pdf | 707.49 kB | Adobe PDF | View/Open |
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