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SVM classifier using LUT-based RAM on a Spartan 3 FPGA [articol]
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| dc.contributor.author | Fazakas, Albert | |
| dc.contributor.author | Cârlugea, Mihaela | |
| dc.contributor.author | Feştilă, Lelia | |
| dc.date.accessioned | 2020-04-10T10:17:16Z | |
| dc.date.accessioned | 2021-03-01T08:37:08Z | |
| dc.date.available | 2020-04-10T10:17:16Z | |
| dc.date.available | 2021-03-01T08:37:08Z | |
| dc.date.issued | 2006 | |
| dc.identifier.citation | Fazakas, Albert. SVM classifier using LUT-based RAM on a Spartan 3 FPGA. Timişoara: Editura Politehnica, 2006 | en_US |
| dc.identifier.uri | http://primo.upt.ro:1701/primo-explore/search?query=any,contains,SVM%20classifier%20using%20LUT-based%20RAM%20on%20a%20Spartan%203%20FPGA&tab=default_tab&search_scope=40TUT&vid=40TUT_V1&lang=ro_RO&offset=0 Link Primo | |
| dc.description.abstract | Support Vector Machines are widely used in pattern recognition, being the newest achievements in neural network structures. This paper presents an implementation example of an SVM classification function using a Spartan3 FPGA device. A Block Ram based implementation is compared versus a distributed LUT-based RAM one. Aspects regarding memory geometry and instantiation are presented. The number of required clock periods and the maximum clock frequency is calculated and a speed comparison of the implemented system with software running on a PC targeting the same application is also made. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | Timişoara: Editura Politehnica | en_US |
| dc.relation.ispartofseries | Seria electronică şi telecomunicaţii, Tom 51(65), fasc. 1 (2006) | |
| dc.subject | SVM | en_US |
| dc.subject | Block RAM | en_US |
| dc.subject | LUT-based RAM | en_US |
| dc.subject | FPGA | en_US |
| dc.title | SVM classifier using LUT-based RAM on a Spartan 3 FPGA [articol] | en_US |
| dc.type | Article | en_US |
