dc.contributor.author |
Feştilă, Lelia |
|
dc.contributor.author |
Groza, Robert |
|
dc.contributor.author |
Szolga, Lorant Andras |
|
dc.contributor.author |
Hintea, Sorin |
|
dc.date.accessioned |
2020-04-10T10:29:56Z |
|
dc.date.accessioned |
2021-03-01T08:38:31Z |
|
dc.date.available |
2020-04-10T10:29:56Z |
|
dc.date.available |
2021-03-01T08:38:31Z |
|
dc.date.issued |
2006 |
|
dc.identifier.citation |
Feştilă, Lelia. Log-domain multipliers for VLSI architectures. Timişoara: Editura Politehnica, 2006 |
en_US |
dc.identifier.uri |
http://primo.upt.ro:1701/primo-explore/search?query=any,contains,Log-domain%20multipliers%20for%20VLSI%20architectures&tab=default_tab&search_scope=40TUT&vid=40TUT_V1&lang=ro_RO&offset=0 Link Primo |
|
dc.description.abstract |
We propose new modular configurations for one-, two-, and four quadrant multipliers in order to be used in large dimension circuits, like analog support vector machines or neural networks. Some investigations on these structures are made taking into account the real configurations and parameters of transistors in BiCMOS technology. We also underline the advantage of using such modular structures for high frequency large dimension circuits. |
en_US |
dc.language.iso |
en |
en_US |
dc.publisher |
Timişoara: Editura Politehnica |
en_US |
dc.relation.ispartofseries |
Seria electronică şi telecomunicaţii, Tom 51(65), fasc. 1 (2006) |
|
dc.subject |
Log-domain |
en_US |
dc.subject |
Analog multiplier |
en_US |
dc.subject |
VLSI architecture |
en_US |
dc.title |
Log-domain multipliers for VLSI architectures [articol] |
en_US |
dc.type |
Article |
en_US |