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Analysis of harmonic minimization for interleaved synchronous buck converter using VCPFC [articol]

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dc.contributor.author Thangam, R.
dc.contributor.author Vasantha Rani, S.P.Joy
dc.date.accessioned 2024-09-10T10:27:02Z
dc.date.available 2024-09-10T10:27:02Z
dc.date.issued 2020
dc.identifier.citation Thangam, R.; Vasantha Rani, S.P.Joy. Analysis of harmonic minimization for interleaved synchronous buck converter using VCPFC. Timişoara: Editura Politehnica, 2020. en_US
dc.identifier.issn 1582-4594
dc.identifier.uri https://dspace.upt.ro/xmlui/handle/123456789/6518
dc.description.abstract In this work power factor improvement and harmonic minimization for the interleaved synchronous buck converter connected through nonlinear load is proposed. The interleaved converter supplied with 240V and reaches 12V as output. The converter output always connected with nonlinearloads, causes less power factor with more harmonics. Active PLL with voltage controlled power factor controller is designed to reduce harmonics and to rise the power factor.The VCPFC controller designed using MATLAB Simulink .Controller output waveforms are examined and analyzed with other controller performances. The converter is rated with 2mA,1mH,and 1000μF values. The chopper is tested for different resistive loads and inductive loads. en_US
dc.language.iso en en_US
dc.publisher Timișoara : Editura Politehnica en_US
dc.relation.ispartofseries Journal of Electrical Engineering;Vol 20 No 5
dc.subject Interleaved buck converter (IBC) en_US
dc.subject Voltage mode control en_US
dc.subject Voltage controlled power factor correction (VCPFC) en_US
dc.subject Total harmonic distortion(THD) en_US
dc.subject Electromagnetic interference(EMI) en_US
dc.subject Phase locked loop(PLL) en_US
dc.subject Unity power factor(UPF) en_US
dc.title Analysis of harmonic minimization for interleaved synchronous buck converter using VCPFC [articol] en_US
dc.type Article en_US


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