Analysis of new reduced count single phase multilevel inverter [articol]

Abstract

The paper brings out a new topology for a single phase multilevel inverter (MLI) in an effort to reduce the number of switches in the path for the flow of current. The emphasis encompasses flexibility on the number of levels of the output voltage in accordance with the specific requirements at the utility end. The second perspective owes to equalize the number of switching to synthesize each output level in addition to enabling a reduction in the total harmonic distortion (THD) of the output voltage. The variation in the carrier wave frequency allows the sinusoidal reference to mitigate the higher frequency components of the output voltage and contribute to an increase in its fundamental component. The MATLAB based simulation results enliven the ability of the variable frequency carrier band (VFCB) pulse width modulation (PWM) strategy to obviate the performance of the multicarrier PWM in terms of an improved spectrum for the output voltage. The experimental reading obtained through the use of field programmable gate array (FPGA) validates the simulated response and claims its viability for use in real world applications.