Browsing by Author Feştilă, Lelia
Showing results 1 to 6 of 6
| Issue Date | Title | Author(s) |
| 2006 | An analog computing circuit for SVM classifiers [articol] | Feştilă, Lelia; Szolga, Lorant Andras; Cîrlugea, Mihaela; Gordan, Mihaela |
| 2006 | Linearity considerations for adaptively biased transconductors with applications in continuous time filters [articol] | Rus, Cristian Matei; Feştilă, Lelia; Hintea, Sorin |
| 2004 | A log-domain circuit design method based on F-1 N F models [articol] | Feştilă, Lelia; Groza, Robert; Fazakas, Albert; Cîrlugea, Mihaela; Hintea, Sorin |
| 2006 | Log-domain multipliers for VLSI architectures [articol] | Feştilă, Lelia; Groza, Robert; Szolga, Lorant Andras; Hintea, Sorin |
| 2006 | SVM classifier using LUT-based RAM on a Spartan 3 FPGA [articol] | Fazakas, Albert; Cârlugea, Mihaela; Feştilă, Lelia |
| 2004 | Using SINH-Z building blocks in linear applications [articol] | Fazakas, Albert; Feştilă, Lelia; Groza, Robert |
