The micropower translinear network implementation of rational approximated and partial fractions decomposed functions [articol]

Abstract

In this paper is presented a translinear topology suitable for static and dynamic analog signal processing at very low supply voltage. The one variable objective functions, firstly are rational approximated, then decomposed in partial fractions and finally implemented with CMOS translinear networks. Such functions processing have small computational time and leads to the implementations with controllable errors. This topology will be used in structural synthesis program, named TLSS, for automate synthesis of translinear circuits.