Please use this identifier to cite or link to this item: https://dspace.upt.ro/xmlui/handle/123456789/1547
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dc.contributor.authorFazakas, Albert-
dc.contributor.authorCârlugea, Mihaela-
dc.contributor.authorFeştilă, Lelia-
dc.date.accessioned2020-04-10T10:17:16Z-
dc.date.accessioned2021-03-01T08:37:08Z-
dc.date.available2020-04-10T10:17:16Z-
dc.date.available2021-03-01T08:37:08Z-
dc.date.issued2006-
dc.identifier.citationFazakas, Albert. SVM classifier using LUT-based RAM on a Spartan 3 FPGA. Timişoara: Editura Politehnica, 2006en_US
dc.identifier.urihttp://primo.upt.ro:1701/primo-explore/search?query=any,contains,SVM%20classifier%20using%20LUT-based%20RAM%20on%20a%20Spartan%203%20FPGA&tab=default_tab&search_scope=40TUT&vid=40TUT_V1&lang=ro_RO&offset=0 Link Primo-
dc.description.abstractSupport Vector Machines are widely used in pattern recognition, being the newest achievements in neural network structures. This paper presents an implementation example of an SVM classification function using a Spartan3 FPGA device. A Block Ram based implementation is compared versus a distributed LUT-based RAM one. Aspects regarding memory geometry and instantiation are presented. The number of required clock periods and the maximum clock frequency is calculated and a speed comparison of the implemented system with software running on a PC targeting the same application is also made.en_US
dc.language.isoenen_US
dc.publisherTimişoara: Editura Politehnicaen_US
dc.relation.ispartofseriesSeria electronică şi telecomunicaţii, Tom 51(65), fasc. 1 (2006)-
dc.subjectSVMen_US
dc.subjectBlock RAMen_US
dc.subjectLUT-based RAMen_US
dc.subjectFPGAen_US
dc.titleSVM classifier using LUT-based RAM on a Spartan 3 FPGA [articol]en_US
dc.typeArticleen_US
Appears in Collections:Articole științifice/Scientific articles

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