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DC Field | Value | Language |
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dc.contributor.author | Jipa, Răzvan | - |
dc.date.accessioned | 2020-04-15T10:07:45Z | - |
dc.date.accessioned | 2021-03-01T08:37:58Z | - |
dc.date.available | 2020-04-15T10:07:45Z | - |
dc.date.available | 2021-03-01T08:37:58Z | - |
dc.date.issued | 2008 | - |
dc.identifier.citation | Jipa, Răzvan. Transforming synchronous standard socket designs to GALS designs. Timişoara: Editura Politehnica, 2008 | en_US |
dc.identifier.uri | http://primo.upt.ro:1701/primo-explore/search?query=any,contains,Transforming%20synchronous%20standard%20socket%20designs%20to%20GALS%20designs&tab=default_tab&search_scope=40TUT&vid=40TUT_V1&lang=ro_RO&offset=0 Link Primo | - |
dc.description.abstract | The paper presents a solution for transforming a fully synchronous socket based design into a GALS structure that eliminates the need for a global clock, thus reducing the power consumption. The solution presents a set of asynchronous wrappers that transforms the standards synchronous interface into an asynchronous one while provide a stoppable clocking solution to further reduce the consumed power. The solution was proved in simulation using a communication system with one master and multiple slaves. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Timişoara:Editura Politehnica | en_US |
dc.relation.ispartofseries | Seria electronică şi telecomunicaţii;Tom 53(67), fasc. 1 (2008), p. 47-53 | - |
dc.subject | OCP | en_US |
dc.subject | GALS | en_US |
dc.subject | Asynchronous wrapper | en_US |
dc.title | Transforming synchronous standard socket designs to GALS designs [articol] | en_US |
dc.type | Article | en_US |
Appears in Collections: | Articole științifice/Scientific articles |
Files in This Item:
File | Description | Size | Format | |
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BUPT_ART_Jipa_f.pdf | 2.22 MB | Adobe PDF | View/Open |
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