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DC Field | Value | Language |
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dc.contributor.author | Tisan, Alin | - |
dc.contributor.author | Gavrincea, Ciprian | - |
dc.contributor.author | Oniga, Ştefan | - |
dc.date.accessioned | 2020-05-05T05:48:47Z | - |
dc.date.accessioned | 2021-03-01T08:37:35Z | - |
dc.date.available | 2020-05-05T05:48:47Z | - |
dc.date.available | 2021-03-01T08:37:35Z | - |
dc.date.issued | 2006 | - |
dc.identifier.citation | Tisan, Alin. A generic building block for Hebbian neural network with on-chip learning. Timişoara: Editura Politehnica, 2006 | en_US |
dc.identifier.uri | http://primo.upt.ro:1701/primo-explore/search?query=any,contains,A%20generic%20building%20block%20for%20Hebbian%20neural%20network%20with%20on-chip%20learning&tab=default_tab&search_scope=40TUT&vid=40TUT_V1&lang=ro_RO&offset=0 Link Primo | - |
dc.description.abstract | In this paper, we present a digital hardware implementation of an artificial neuron on-chip unsupervised trained with Hebbian rule. The main characteristics of this solution are on-chip learning algorithm implementation and high reconfiguration capability and operation under real time constraints. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Timişoara: Editura Politehnica | en_US |
dc.relation.ispartofseries | Buletinul ştiinţific al Universităţii „Politehnica” din Timişoara, România. Seria electronică şi telecomunicaţii, Tom 51(65), fasc. 1 (2006), p. 5-8 | - |
dc.subject | FPGA | en_US |
dc.subject | Learning on-chip | en_US |
dc.subject | ANN | en_US |
dc.title | A generic building block for Hebbian neural network with on-chip learning [articol] | en_US |
dc.type | Article | en_US |
Appears in Collections: | Articole științifice/Scientific articles |
Files in This Item:
File | Description | Size | Format | |
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BUPT_ART_Tisan_f.pdf | 1.59 MB | Adobe PDF | View/Open |
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