Superior-order curvature-corrected voltage reference with improved performance [articol]

Abstract

A new curvature-correction technique for improving the temperature behavior of a CMOS voltage reference will be presented. The reducing of the temperature coefficient for the reference voltage will be realized compensating the nonlinear temperature dependence of the gate-source voltage for a MOS transistor working in weak inversion with the difference between two gate-source voltages. These MOS transistors are polarized at drain currents with different temperature dependencies (PTAT and PTATα, respectively), α parameter being selected to the optimal value for the implementing technology. The PTAT voltage generator will be designed using an original Offset Voltage Follower block, with the advantage that matched resistors are replaced by matched transistors and, in consequence, with a relatively smaller degradation of the circuit temperature behavior caused by devices’ mismatches. SPICE simulation reports TC = 1.95 ppm / K for an extended temperature range, 273K < T < 363K , without considering the parameters spread.