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Title: | Standard sockets revolution in ASIC design [articol] |
Authors: | Tulbure, Traian Jipa, Răzvan Nicula, Dan Levinthal, Adam |
Subjects: | SoC OCP Wishbone IP core HDL Digital integrated circuits |
Issue Date: | 2004 |
Publisher: | Timişoara : Editura Politehnica |
Citation: | Tulbure, Traian. Standard sockets revolution in ASIC design. Timişoara: Editura Politehnica, 2004 |
Series/Report no.: | Buletinul ştiinţific al Universităţii „Politehnica” din Timişoara, România. Seria electronică şi telecomunicaţii, Tom 49(63), fasc. 1 (2004), p. 147-152 |
Abstract: | The current approach for designing an integrated circuit as SoC (System-on-Chip) is based on reusing the models for modules with a well-defined functionality. For easier interconnection, these IP cores should have an interface that obeys the rules of a standard socket. Ideally, a SoC socket would enable core designers to concentrate mainly on the core functionality. Similarly, SoC system integrators should be able to concentrate mainly on the SoC timing, core service bandwidth and latency requirements, and the final floor-plan design independent of core functionality. The socket would therefore provide the necessary physical and exchange protocol delineation necessary to achieve this well-defined layering. This paper presents an integrated circuit implementation that uses two standard sockets. It also depicts the problems and the corresponding solutions for socket conversion and interconnection. The presented design has been checked in synthesis and it was proved by an ASIC implementation. |
URI: | http://primo.upt.ro:1701/primo-explore/search?query=any,contains,Standard%20sockets%20revolution%20in%20ASIC%20design&tab=default_tab&search_scope=40TUT&vid=40TUT_V1&lang=ro_RO&offset=0 Link Primo |
Appears in Collections: | Articole științifice/Scientific articles |
Files in This Item:
File | Description | Size | Format | |
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BUPT_ART_Tulbure_f.pdf | 523.41 kB | Adobe PDF | View/Open |
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