Abstract:
An interleaved quadratic boost converter integrated with capacitive voltage multiplier is proposed in this paper. Two quadratic boost switching cells are interleaved to minimize the current ripples in input side. Its output is coupled to a voltage multiplier to incr` ease the static gain, resulting in a higher output voltage with moderate duty cycle. Compared with the conventional boost converter and quadratic boost converter, the proposed converter has reduced voltage stress in the switches and diodes. The detailed analysis of the converter is presented for both continuous. A prototype is simulated and implemented in the laboratory. The results validate the theoretical analysis and confirm the viability and significant performance of the converter. The maximum efficiency of the proposed converter is 91.5 % under full load.
