Please use this identifier to cite or link to this item:
https://dspace.upt.ro/xmlui/handle/123456789/1010| Title: | Procedural design of a CMOS current conveyor [articol] |
| Authors: | Drăgoi, Beniamin |
| Subjects: | Current conveyor EKV model PAD tool |
| Issue Date: | 2009 |
| Publisher: | Timişoara: Editura Politehnica |
| Citation: | Drăgoi, Beniamin. Procedural design of a CMOS current conveyor. Timişoara: Editura Politehnica, 2009 |
| Series/Report no.: | Seria electronică şi telecomunicaţii, Tom 54(68), fasc. 1 (2009); |
| Abstract: | This paper presents a new procedural design sequence for the design of a CMOS current conveyor. It is based on the structured design approach and consists in circuit partitioning, derivation of the specifications for each basic analog structure, and step-by-step design. BSIM2EKV converter is presented and EKV model is used for hand calculations. PAD (Procedural Analog Design) tool is used for validation. CCII step-by-step design is presented. Simulations (for verification and fine-tuning) using Mentor Graphics tools are presented. |
| URI: | http://primo.upt.ro:1701/primo-explore/search?query=any,contains,Procedural%20design%20of%20a%20CMOS%20current%20conveyor&tab=default_tab&search_scope=40TUT&vid=40TUT_V1&lang=ro_RO&offset=0 Link Primo |
| Appears in Collections: | Articole științifice/Scientific articles |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| BUPT_ART_Drăgoi_f.pdf | 815.55 kB | Adobe PDF | View/Open |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.