Please use this identifier to cite or link to this item: https://dspace.upt.ro/xmlui/handle/123456789/3832
Title: The FPGA implementation of a digital controller as a digital filter [articol]
Authors: Mic, Daniel
Micu, Emil
Oniga, Ştefan
Gavrincea, Ciprian George
Subjects: IIR filter
PID controllers
FPGA
Issue Date: 2004
Publisher: Timişoara : Editura Politehnica
Series/Report no.: Buletinul ştiinţific al Universităţii „Politehnica” din Timişoara, România. Seria electronică şi telecomunicaţii, Tom 49(63), fasc. 1 (2004), p. 184-188
Abstract: In this paper, the FPGA approach for implementation of digital controllers is selected because FPGA’s can provide reconfigurable hardware designs, can process information faster than a general purpose DSP, can allow the controller architecture to be optimized for space or speed and bit widths for data registers can be selected based on application needs. Additionally, implementation in VHDL or Verilog allows the targeting of a variety of commercially available FPGA’s. A digital filter very close to, if not exactly, the form of an Infinite Impulse Response (IIR) filter can represent most digital controllers. The software used for PID controller design is Matlab, specifically the tools Simulink and System Generator. The Simulink is used for determining the system response and for tuning the PID controller. With System Generator the controller is designed and the FPGA implementable VHDL code is generated. The controlled system chosen is a brushless DC motor (BLDC).
URI: http://primo.upt.ro:1701/primo-explore/fulldisplay?docid=40TUT000137620&context=L&vid=40TUT_V1&lang=ro_RO&search_scope=40TUT&adaptor=Local%20Search%20Engine&tab=default_tab&query=any,contains,The%20FPGA%20implementation%20of%20a%20digital%20controller%20as%20a%20digital%20filter&sortby=rank&offset=0 Link Primo
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